In design of semiconductor integrated circuits, cells or blocks having a logic function or memory function are arranged in a chip, and input and output terminals are wired. Then, a layout on a chip region is determined so as to obtain a desired circuit operation. An automatic design device automatically optimizes the cell placement and the wiring between terminals so as to determine the entire layout of chip region.
Meanwhile, as the miniaturization of semiconductor integrated circuits proceeds, it is increasingly difficult to manufacture a target geometric shape having electric performance, which is intended in design by a designer, on a substrate. In order to manufacture a target geometric shape on a substrate, optical correction processing using mask data processing (MDP) and optical proximity correction (OPC) is performed on basic geometry such as wiring lines and the like, which are arranged on a chip region, and various geometry necessary from a request in manufacturing are added (for example, refer to JP-A-10-153851). Further, analysis or correction processing of circuit characteristics is also performed on the basic geometry to which various geometries are added, and various geometry necessary from a request for circuit characteristics are also added.
In an automatic design device which is currently and generally used, however, graphic processing in which various geometry are added to basic geometry is executed in different processes from each other by various design tools. Therefore, it is impossible to clearly discriminate whether the geometry are added from a request in manufacture or from a request for circuit characteristics. As a result, the information of additional geometries added from a request in manufacture, which are not actually formed on a substrate, is analyzed as a target of circuit analysis, thereby degrading extraction precision of circuit characteristics. Further, since the types of added geometry cannot be discriminated, it is difficult to perform optimal design which satisfies both a request in manufacture and a request for circuit characteristics. Therefore, design efficiency and design precision are also degraded.